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precision, ultralow noise, rrio, zero-drift op amp ADA4528-1 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2011 analog devices, inc. all rights reserved. features low offset: 2.5 v maximum low offset voltage drift: 0.015 v/c maximum low noise 5.6 nv/hz at f = 1 khz, a v = +100 97 nv p-p at f = 0.1 hz to 10 hz, a v = +100 open-loop voltage gain: 130 db minimum cmrr: 135 db minimum psrr: 130 db minimum gain bandwidth product: 4 mhz single-supply operation: 2.2 v to 5.5 v dual-supply operation: 1.1 v to 2.75 v rail-to-rail input and output unity-gain stable applications thermocouple/thermopile load cell and bridge transducer precision instrumentation electronic scales medical instrumentation handheld test equipment pin configuration nc 1 ? in 2 +in 3 v? 4 nc 8 v+ 7 out 6 nc 5 nc = no connect. do not connect to this pin. ADA4528-1 top view (not to scale) 09437-001 figure 1. 8-lead msop general description the ADA4528-1 is an ultralow noise, zero-drift operational am- plifier featuring rail-to-rail input and output swing. with an offset voltage of 2.5 v, offset voltage drift of 0.015 v/c, and noise of 97 nv p-p (0.1 hz to 10 hz, a v = +100), the ADA4528-1 is well suited for applications in which error sources cannot be tolerated. theADA4528-1 has a wide operating supply range of 2.2 v to 5.5 v, high gain, and excellent cmrr and psrr specifications that make it ideal for precision amplification of low level signals, such as position and pressure sensors, strain gages, and medical instrumentation. the ADA4528-1 is specified over the extended industrial temperature range (?40c to +125c) and is available in an 8-lead msop package. table 1. analog devices, inc., zero-drift op amp portfolio 1 type ultralow noise micropower (<20 a) low power (<1 ma) 16 v operating voltage single ADA4528-1 ada4051-1 ad8628 ad8638 ad8538 dual ada4051-2 ad8629 ad8639 ad8539 quad ad8630 1 see www.analog.com for a selection of zero-drift operational amplifiers.
ADA4528-1 rev. 0 | page 2 of 20 table of contents features .............................................................................................. 1 applications....................................................................................... 1 pin configuration............................................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications..................................................................................... 3 electrical characteristics2.5 v operation ............................ 3 electrical characteristics5 v operation................................ 4 absolute maximum ratings............................................................ 5 thermal resistance ...................................................................... 5 esd caution...................................................................................5 typical performance characteristics ..............................................6 applications information .............................................................. 15 input protection ......................................................................... 15 rail-to-rail input and output.................................................. 15 noise considerations................................................................. 15 printed circuit board layout ................................................... 17 outline dimensions ....................................................................... 18 ordering guide .......................................................................... 18 revision history 1/11revision 0: initial version
ADA4528-1 rev. 0 | page 3 of 20 specifications electrical characteristics2.5 v operation v s = 2.5 v, v cm = v sy /2 v, t a = 25c, unless otherwise specified. table 2. parameter symbol test conditions/comments min typ max unit input characteristics offset voltage v os v cm = 0 v to 2.5 v 0.3 2.5 v ?40c t a +125c 4 v offset voltage drift v os /t ?40c t a +125c 0.002 0.015 v/c input bias current i b 220 400 pa ?40c t a +125c 600 pa input offset current i os 440 800 pa ?40c t a +125c 1 na input voltage range 0 2.5 v common-mode rejection ratio cmrr v cm = 0 v to 2.5 v 135 158 db ?40c t a +125c 116 db open-loop gain a vo r l = 10 k, v o = 0.1 v to 2.4 v 130 140 db ?40c t a +125c 126 db r l = 2 k, v o = 0.1 v to 2.4 v 125 132 db ?40c t a +125c 121 db input resistance, differential mode r indm 225 k input resistance, common mode r incm 1 g input capacitance, differential mode c indm 15 pf input capacitance, common mode c incm 30 pf output characteristics output voltage high v oh r l = 10 k to v cm 2.49 2.495 v ?40c t a +125c 2.485 v r l = 2 k to v cm 2.46 2.48 v ?40c t a +125c 2.44 v output voltage low v ol r l = 10 k to v cm 5 10 mv ?40c t a +125c 15 mv r l = 2 k to v cm 20 40 mv ?40c t a +125c 60 mv short-circuit current i sc 30 ma closed-loop output impedance z out f = 1 khz, a v = +10 0.1 power supply power supply rejection ratio psrr v s = 2.2 v to 5.5 v 130 150 db ?40c t a +125c 127 db supply current/amplifier i sy i o = 0 ma 1.4 1.7 ma ?40c t a +125c 2.1 ma dynamic performance slew rate sr r l = 10 k, c l = 100 pf, a v = +1 0.45 v/s settling time to 0.1% t s v in = 1.5 v step, r l = 10 k, c l = 100 pf 7 s gain bandwidth product gbp r l = 10 k, c l = 100 pf, a v = +1 4 mhz phase margin m r l = 10 k, c l = 100 pf, a v = +1 57 degrees overload recovery time r l = 10 k, c l = 100 pf, a v = ?10 50 s noise performance voltage noise e n p-p f = 0.1 hz to 10 hz, a v = +100 97 nv p-p voltage noise density e n f = 1 khz, a v = +100 5.6 nv/hz f = 1 khz, a v = +100, v cm = 2.0 v 5.5 nv/hz current noise i n p-p f = 0.1 hz to 10 hz, a v = +100 2.6 pa p-p current noise density i n f = 1 khz, a v = +100 0.7 pa/hz
ADA4528-1 rev. 0 | page 4 of 20 electrical characteristics5 v operation v s = 5 v, v cm = v sy /2 v, t a = +25c, unless otherwise specified. table 3. parameter symbol test conditions/comments min typ max unit input characteristics offset voltage v os v cm = 0 v to 5 v 0.3 2.5 v ?40c t a +125c 4 v offset voltage drift v os /t ?40c t a +125c 0.002 0.015 v/c input bias current i b 90 200 pa ?40c t a +125c 300 pa input offset current i os 180 400 pa ?40c t a +125c 500 pa input voltage range 0 5 v common-mode rejection ratio cmrr v cm = 0 v to 5 v 137 160 db ?40c t a +125c 122 db open-loop gain a vo r l = 10 k, v o = 0.1 v to 4.9 v 127 139 db ?40c t a +125c 125 db r l = 2 k, v o = 0.1 v to 4.9 v 121 131 db ?40c t a +125c 120 db input resistance, differential mode r indm 190 k input resistance, common mode r incm 1 g input capacitance, differential mode c indm 16.5 pf input capacitance, common mode c incm 33 pf output characteristics output voltage high v oh r l = 10 k to v cm 4.99 4.995 v ?40c t a +125c 4.98 v r l = 2 k to v cm 4.96 4.98 v ?40c t a +125c 4.94 v output voltage low v ol r l = 10 k to v cm 5 10 mv ?40c t a +125c 20 mv r l = 2 k to v cm 20 40 mv ?40c t a +125c 60 mv short-circuit current i sc 40 ma closed-loop output impedance z out f = 1 khz, a v = +10 0.1 power supply power supply rejection ratio psrr v sy = 2.2 v to 5.5 v 130 150 db ?40c t a +125c 127 db supply current/amplifier i sy i o = 0 ma 1.5 1.8 ma ?40c t a +125c 2.2 ma dynamic performance slew rate sr r l = 10 k, c l = 100 pf, a v = +1 0.5 v/s settling time to 0.1% t s v in = 4 v step, r l = 10 k, c l = 100 pf 10 s gain bandwidth product gbp r l = 10 k, c l = 100 pf, a v = +1 4 mhz phase margin m r l = 10 k, c l = 100 pf, a v = +1 57 degrees overload recovery time r l = 10 k, c l = 100 pf, a v = ?10 50 s noise performance voltage noise e n p-p f = 0.1 hz to 10 hz, a v = +100 99 nv p-p voltage noise density e n f = 1 khz, a v = +100 5.9 nv/hz f = 1 khz, a v = +100, v cm = 4.5 v 5.3 nv/hz current noise i n p-p f = 0.1 hz to 10 hz, a v = +100 2.6 pa p-p current noise density i n f = 1 khz, a v = +100 0.5 pa/hz
ADA4528-1 rev. 0 | page 5 of 20 absolute maximum ratings thermal resistance table 4. parameter rating supply voltage 6 v input voltage v sy 0.3 v input current 1 10 ma differential input voltage v sy output short-circuit duration to gnd indefinite storage temperature range ?65c to +150c operating temperature range ?40c to +125c junction temperature range ?65c to +150c lead temperature (soldering, 60 sec) 300c ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. this was measured using a standard 4-layer board. table 5. thermal resistance package type ja jc unit 8-lead msop (rm-8) 142 45 c/w esd caution 1 the input pins have clamp diodes to the power supply pi ns. limit the input current to 10 ma or less whenever in put signals exceed the power supply rail by 0.5 v. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ADA4528-1 rev. 0 | page 6 of 20 typical performance characteristics t a = 25c, unless otherwise noted. 100 90 80 70 60 50 40 30 20 10 number of amplifiers 100 90 80 70 60 50 40 30 20 10 0 number of amplifiers 0 ?1.0 ?0.6 00 . 61 . 0 v os (v) ?0.8 ?0.4 0.2 ?0.2 0.4 0.8 09 437-002 v sy = 2.5v v cm = v sy /2 figure 2. input offset voltage distribution 0 09 6 31 2 1 5 10 20 30 40 50 60 number of amplifiers tcv os (nv/c) v sy = 2.5v v cm = v sy /2 09437-003 figure 3. input offset voltage drift distribution 1.0 0.8 0.6 0.4 0 ?0.4 ?0.8 v os (v) ?1.0 00 . 5 2.5 v cm (v) 0.2 ?0.2 ?0.6 1.5 1.0 2.0 09437-004 v sy = 2.5v figure 4. input offset voltage vs. common-mode voltage v sy = 5v v cm = v sy /2 ?1.0 ?0.6 00 . 61 . 0 v os (v) 09437-005 ?0.8 ?0.4 0.2 ?0.2 0.4 0.8 figure 5. input offset voltage distribution 0 10 20 30 40 50 60 number of amplifiers v sy = 5v v cm = v sy /2 09437-006 09 6 31 2 1 5 tcv os (nv/c) figure 6. input offset voltage drift distribution 1.0 0.8 0.6 0.4 0 ?0.4 ?0.8 ?1.0 01 5 3 2 4 09437-0 v sy = 5v 0.2 ?0.2 ?0.6 v os (v) 07 v cm (v) figure 7. input offset voltage vs. common-mode voltage
ADA4528-1 rev. 0 | page 7 of 2 ?400 ?300 ?100 ?200 0 200 300 100 400 i b (pa) 0 ?50 ?25 0 25 50 75 100 125 temperature (c) i b + i b ? 08 09437-0 v sy = 2.5v v cm = v sy /2 ?400 ?300 ?100 ?200 0 200 300 100 400 ?50 ?25 0 25 50 75 100 125 i b (pa) temperature (c) v sy = 5v v cm = v sy /2 i b + i b ? 09437-110 figure 8. input bias current vs. temperature ?600 i b (pa) +25c ?400 ?200 0 200 400 600 0 0.5 1.0 1.5 2.0 2.5 v cm (v) +125c +85c ?40c v sy = 2.5v 9 09437-00 figure 9. input bias current vs. common-mode voltage figure 11. input bias current vs. temperature 0.001 100 0.01 0.1 1 10 load current (ma) v sy = 2.5v ?40c +25c +85c +125c 10 1 100m 10m 1m ut voltage (v ol ) to supply rail (v) 0.1m outp 09437-014 figure 10. output voltage (v ol ) to supply rail vs. load current ?800 ?600 ?400 ?200 0 200 400 600 0123 4 5 i b (pa) v cm (v) +125c v sy = 5v 09437-012 +25c +85c ?40c figure 12. input bias current vs. common-mode voltage v s = 5v ?40c +25c +85c +125c 0.001 100 0.01 0.1 1 10 10 1 100m 10m 1m 0.1m output voltage (v ol ) to supply rail (v) 017 load current (ma) 09437- figure 13. output voltage (v ol ) to supply rail vs. load current
ADA4528-1 rev. 0 | page 8 of 2 0 10 1 100m 10m 1m 0.1m output voltage (v oh ) to supply rail (v) 0.001 100 0.01 0.1 1 10 load current (ma) v sy = 2.5v ?40c +25c +85c +125c 09437-01 0 figure 14. output voltage (v oh ) to supply rail vs. load current 0 5 10 15 20 25 output voltage (v ol ) to supply rail (mv) ?50 ?25 0 25 50 75 100 125 temperature (c) r l = 2k ? r l = 10k ? 0 9437-01 6 v sy = 2.5v figure 15. output voltage (v ol ) to supply rail vs. temperature 0 ?50 ?25 0255075100125 outp temperature (c) 5 10 15 20 25 ut voltage (v oh ) to supply rail (mv) r l = 2k ? v sy = 2.5v r l = 10k ? 0 9437-015 figure 16. output voltage (v oh ) to supply rail vs. temperature 0.001 100 0.01 0.1 1 10 load current (ma) v sy = 5v ?40c +25c +85c +125c 10 1 100m 10m 1m 0.1m output voltage (v oh ) to supply rail (v) 09437-013 figure 17. output voltage (v oh ) to supply rail vs. load current 0 5 10 15 20 25 30 35 40 45 output voltage (v ol ) to supply rail (mv) r l = 2k ? r l = 10k ? ?50 ?25 0 25 50 75 100 125 temperature (c) v sy = 5v 09437-019 figure 18. output voltage (v ol ) to supply rail vs. temperature 0 5 10 15 20 25 output voltage (v oh ) to supply rail (mv) r l = 2k ? v sy = 5v r l = 10k ? ?50 ?25 0255075100125 temperature (c) 0 9437-117 figure 19. output voltage (v oh ) to supply rail vs. temperature
ADA4528-1 rev. 0 | page 9 of 2 0 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 i sy pe 0 0.51.01.52.02.53.03.54.04.55.05.5 r amplifier (ma) v sy (v) +125c ?40c +85c +25c 1.0 1.2 1.4 1.6 1.8 2.0 ?50 ?25 0 25 50 75 100 125 i sy per amplifier (ma) temperature (c) v sy = 5.0v v sy = 2.5v 09437-0 21 figure 20. supply current vs. supply voltage 09437-024 ?90 ?30 phase (degrees) open-loop gain (db) ?45 0 45 90 135 0 30 60 90 120 1k 10k 100k 1m 10m frequency (hz) v sy = 2.5v r l = 10k ? c l = 100pf 09437-022 phase gain figure 21. open-loop gain and phase vs. frequency figure 23. supply current vs. temperature ?90 ?45 0 45 90 135 ?30 0 30 60 90 120 1k 10k 100k 1m 10m phase (degrees) open-loop gain (db) frequency (hz) ?20 ?10 10 100 1k 10k 100k 1m 10m frequency (hz) 0 10 20 30 40 50 60 closed-loop gain (db) a v = 100 v sy = 2.5v a v = 10 a v = 1 09437-026 figure 22. closed-loop gain vs. frequency v sy = 5v r l = 10k ? c l = 100pf 09437-025 phase gain figure 24. open-loop gain and phase vs. frequency ?20 ?10 0 10 20 30 40 50 60 closed-loop gain (db) 10 100 1k 10k 100k 1m 10m frequency (hz) a v = 100 v sy = 5v a v = 10 a v = 1 29 09437-0 figure 25. closed-loop gain vs. frequency
ADA4528-1 rev. 0 | page 10 of 20 0 cmrr (db) 20 40 60 80 100 120 140 160 100 1k 10k 100k 1m 10m frequency (hz) v sy = 2.5v v cm = v sy /2 v cm = 1.1v 6 09437-12 figure 26. cmrr vs. frequency 0 20 40 60 80 100 120 140 100 1k 10k 100k 1m 10m cmrr (db) frequency (hz) v sy = 5v v cm = v sy /2 09437-031 ?20 psrr (db) 0 20 40 60 80 100 120 100 1k 10k 100k 1m 10m frequency (hz) psrr+ psrr? 09437-0 32 v sy = 2.5v figure 27. psrr vs. frequency figure 29. cmrr vs. frequency ?20 0 20 40 60 80 100 120 100 1k 10k 100k 1m 10m psrr (db) frequency (hz) 0.001 100 1k 10k 100k 1m 10m frequency (hz) 0.01 0.1 1 10 100 1k z out ( ? ) a v = 100 v sy = 2.5v a v = 10 a v = 1 09437-027 figure 28. output im pedance vs. frequency psrr+ psrr? 09437-035 v sy = 5v figure 30. psrr vs. frequency 100 1k 10k 100k 1m 10m frequency (hz) a v = 100 v sy = 5v a v = 10 a v = 1 09437-030 0.001 0.01 0.1 1 10 100 1k figure 31. output im pedance vs. frequency z out ( ? )
ADA4528-1 rev. 0 | page 11 of 20 time (20s/div) voltage (0.5v/div) v sy = 1.25v v in = 2v p-p a v = 1 r l = 10k ? c l = 100pf 4 09437-03 figure 32. large signal transient response time (1s/div) time (20s/div) voltage (1v/div) v sy = 2.5v v in = 4v p-p a v = 1 r l = 10k ? c l = 100pf 09437-037 voltage (50mv/div) v sy = 1.25v v in = 100mv p-p a v = 1 r l = 10k ? c l = 100pf 8 09437-03 figure 33. small signal transient response figure 35. large signal transient response time (1s/div) voltage (50mv/div) v sy = 2.5v v in = 100mv p-p a v = 1 r l = 10k ? c l = 100pf 09437-041 figure 36. small signal transient response 0 1 10 100 1000 load capacitance (pf) 2 4 6 8 10 12 14 16 overshoot (%) os+ os? v sy = 2.5v v in = 100mv p-p a v = 1 r l = 10k ? 0 2 4 6 8 10 12 14 16 overshoot (%) v sy = 5v v in = 100mv p-p a v = 1 r l = 10k ? os+ os? 09437-033 figure 34. small signal overshoot vs. load capacitance 09437-036 1 10 100 1000 load capacitance (pf) figure 37. small signal overshoot vs. load capacitance
ADA4528-1 rev. 0 | page 12 of 20 time (10s/div) ?1 0.5 0 ?0.5 input voltage (v) 0 1 2 output voltage (v) v sy = 1.25v a v = ?10 v in = 187.5mv r l = 10k ? c l = 100pf 0 09437-04 input output figure 38. positive overload recovery time (10s/div) ?2 time (10s/div) 0.5 0 ?0.5 input voltage (v) ?1 0 1 2 3 output voltage (v) input v sy = 2.5v a v = ?10 v in = 375mv r l = 10k ? c l = 100pf 09437-043 output 0.5 0 ?0.5 input voltage (v) ?1 0 1 output voltage (v) v sy = 1.25v v in = 187.5mv a v = ?10 r l = 10k ? c l = 100pf 09437-039 input output figure 39. negative overload recovery 09437-044 time (10s/div) voltage (1v/div) v sy = 2.5v r l = 10k ? c l = 100pf input +7.5mv 0 ?7.5mv output error band figure 40. positive settling time to 0.1% figure 41. positive overload recovery time (10s/div) 0.5 0 ?0.5 input voltage (v) ?3 ?2 ?1 0 1 output voltage (v) input output v sy = 2.5v a v = ?10 v in = 375mv r l = 10k ? c l = 100pf 09437-042 figure 42. negative overload recovery 09437-04 time (10s/div) 7 voltage (2v/div) v sy = 5v r l = 10k ? c l = 100pf input +20mv 0 ?20mv output error band figure 43. positive settling time to 0.1%
ADA4528-1 rev. 0 | page 13 of 7-045 voltage (1v/div) 20 0943 time (10s/div) v sy = 2.5v r l = 10k ? c l = 100pf input output error band +7.5mv 0 ?7.5mv figure 44. negative settling time to 0.1% 1 10 100 voltage noise density (nv/ hz) 1 10 100 1k 10k frequency (hz) v sy = 2.5v a v = 100 v cm = v sy /2 6 09437-04 figure 45. voltage noise density vs. frequency 0.1 1 10 100 1k 10k 100k frequency (hz) 1 10 current noise density (pa/ hz) v sy = 2.5v v cm = v sy /2 a v = 100 09437-150 09437-048 time (10s/div) voltage (2v/div) figure 46. current noise density vs. frequency v sy = 5v r l = 10k ? c l = 100pf input +20mv 0 ?20mv output error band figure 47. negative settling time to 0.1% 1 10 100 1 10 100 1k 10k voltage noise density (nv/ hz) frequency (hz) v sy = 5v a v = 100 v cm = v sy /2 09437-049 figure 48. voltage noise density vs. frequency 0.1 1 10 current noise density (pa/ hz) 1 10 100 1k 10k 100k frequency (hz) v sy = 5v v cm = v sy /2 a v = 100 3 09437-15 figure 49. current noise density vs. frequency
ADA4528-1 rev. 0 | page 14 of 20 time (1s/div) 09437-05 input voltage (20nv/div) 0 v sy = 2.5v v cm = v sy /2 a v = 100 figure 50. 0.1 hz to 10 hz noise 0.001 0.01 0.1 10 1 thd + n (%) 0.001 0.01 0.1 1 10 amplitude (v p-p) v sy = 2.5v a v = 1 f = 1khz r l = 10k ? 09437-15 2 figure 51. thd + noise vs. amplitude 0.001 10 100 1k 10k 100k frequency (hz) 09437-056 0.01 0.1 1 thd + n (%) v sy = 2.5v r l = 10k ? v in = 2v p-p a v = 1 80khz low-pass filter figure 52. thd + noise vs. frequency time (1s/div) input voltage (20nv/div) 09437-053 v sy = 5v v cm = v sy /2 a v = 100 figure 53. 0.1 hz to 10 hz noise 0.001 0.01 0.1 10 1 0.001 0.01 0.1 1 10 thd + n (%) amplitude (v p-p) v sy = 5v f = 1khz r l = 10k ? 09437-155 a v = 1 figure 54. thd + noise vs. amplitude 0.001 0.01 0.1 1 thd + n (%) 09437-057 a v = 1 80khz low-pass filter v sy = 5v r l = 10k ? v in = 2v p-p 10 100 1k 10k 100k frequency (hz) figure 55. thd + noise vs. frequency
ADA4528-1 rev. 0 | page 15 of 20 3 2 1 0 ?1 ?2 ?3 voltage (v) time (200s/div) applications information v in v out the ADA4528-1 is a precision, ultralow noise, zero-drift opera- tional amplifier that features a patented chopping technique. this chopping technique offers ultralow input offset voltage of 0.3 v typical and input offset voltage drift of 0.002 v/ o c typical. offset voltage errors due to common-mode voltage swings and power supply variations are also corrected by the chopping tech- nique, resulting in a typical cmrr figure of 158 db and a psrr figure of 150 db at 2.5 v supply voltage. the ADA4528-1 has low broadband noise of 5.6 nv/hz (at f = 1 khz, a v = +100, v sy = 2.5 v) and no 1/f noise component. these features are ideal for amplification of low level signals in dc or subhertz high precision applications. v sy = 2.5v a v = 1 r l = 10k ? 09437-059 input protection the ADA4528-1 has internal esd protection diodes that are connected between the inputs and each supply rail. these diodes protect the input transistors in the event of electrostatic dis- charge and are reverse-biased during normal operation. this protection scheme allows voltages as high as approximately 300 mv beyond the rails to be applied at the input of either terminal without causing permanent damage. refer to table 4 in the absolute maximum ratings section. when either input exceeds one of the supply rails by more than 300 mv, these esd diodes become forward-biased and large amounts of current begin to flow through them. without current limiting, this excessive fault current causes permanent damage to the device. if the inputs are expected to be subject to overvoltage conditions, insert a resistor in series with each input to limit the input current to 10 ma maximum. however, consider the resistor thermal noise effect on the entire circuit. at a 5 v supply voltage, the broadband voltage noise of the ADA4528-1 is approximately 6 nv/hz (at unity gain), and a 1 k resistor has thermal noise of 4 nv/hz. adding a 1 k resistor increases the total noise by 30% root sum square (rss). rail-to-rail input and output the ADA4528-1 features rail-to-rail input and output with a supply voltage from 2.2 v to 5.5 v. figure 56 shows the input and output waveforms of the ADA4528-1 configured as a unity- gain buffer with a supply voltage of 2.5 v and a resistive load of 10 k. with an input voltage of 2.5 v, the ADA4528-1 allows the output to swing very close to both rails. additionally, it does not exhibit phase reversal. figure 56. rail-to rail input and output noise considerations 1/f noise 1/f noise, also known as pink noise or flicker noise, is inherent in semiconductor devices and increases as frequency decreases. at low frequency, 1/f noise is a major noise contributor and causes a significant output voltage offset when amplified by the noise gain of the circuit. however, the ADA4528-1 eliminates the 1/f noise internally, thus making it an excellent choice for dc or subhertz high precision applications. the 0.1 hz to 10 hz am- plifier voltage noise is only 97 nv p-p (a v = +100) at 2.5 v of supply voltage. the low frequency 1/f noise appears as a slow varying offset to the ADA4528-1 and is greatly reduced by the chopping technique. this allows the ADA4528-1 to have a much lower noise at dc and low frequency in comparison to standard low noise amplifiers that are susceptible to 1/f noise. figure 45 and figure 48 show the voltage noise density of the amplifier with no 1/f noise. source resistance the ADA4528-1 is one of the lowest noise zero drift amplifiers with 5.6 nv/hz of broadband noise at 1 khz (v sy = 2.5 v and a v = +100) currently available in the industry. therefore, it is important to consider the input source resistance of choice to maintain a total low noise. the total input referred broadband noise (e n total) from any amplifier is primarily a function of three types of noise: input voltage noise, input current noise, and thermal (johnson) noise from the external resistors. these uncorrelated noise sources can be summed up in a root sum squared (rss) manner by using the following equation: e n total = [ e n 2 + 4 ktr s + ( i n r s ) 2 ] 1/2 where: e n is the input voltage noise of the amplifier (v/hz). i n is the input current noise of the amplifier (a/hz). r s is the total input source resistance (). k is the boltzmanns constant (1.38 10 ?23 j/k). t is the temperature in kelvin (k).
ADA4528-1 rev. 0 | page 16 of 20 0 1 10 100 1000 09437-061 the total equivalent rms noise over a specific bandwidth is expressed as e n,rms = e n total bw where bw is the bandwidth in hertz. this analysis is valid for broadband noise calculation. if the bandwidth of concern includes the chopping frequency, more complicated calculations must be made to include the effect of the noise spike at the chopping frequency (see figure 59 ). with a low source resistance of r s < 1 k, the voltage noise of the amplifier dominates. as source resistance increases, the thermal noise of r s dominates. as the source resistance further increases, where r s > 100 k, the current noise becomes the main contributor of the total input noise. a good selection table for low noise op amps can be found in the an-940 application note, low noise amplifier selection guide for optimal noise performance. voltage noise density with different gain configurations figure 57 shows the voltage noise density vs. closed-loop gain of a zero-drift amplifier from competitor a. the voltage noise density of the amplifier increases from 11 nv/hz to 21 nv/hz as closed- loop gain decreases from 1000 to 1. figure 58 shows the voltage noise density vs. frequency of the ADA4528-1 for three different gain configurations. the ADA4528-1 offers lower input voltage noise density of 6 nv/hz to 7 nv/hz regardless of gain configurations. 24 20 16 12 8 4 voltage noise density (nv/ hz) closed-loop gain (v/v) v sy = 5v f = 100hz competitor a figure 57. competitor a: voltage noise density vs. closed-loop gain 1 10 100 1 10 100 1k 10k vol t age noise density (nv/ hz) frequency (hz) v sy = 5v v cm = v sy /2 a v = 10 a v = 1 a v = 100 09437-062 figure 58. voltage noise density vs. frequency residual ripple although the acfb suppresses the chopping related ripples, there exists higher noise spectrum at the chopping frequency and its harmonics due to the remaining ripples. figure 59 shows the voltage noise density of the ADA4528-1 configured in unity gain. a noise spike of 50 nv/hz can be seen at the chopping frequency of 200 khz. this noise spike is significant when the op amp has a closed-loop freque ncy that is higher than the chopping frequency. to further suppress the noise to a desired level, it is recommended to have a post filter at the output of the amplifier. 1 10 100 1 10 100 1k 10k 100k 1m 10m voltage noise density (nv/ hz) 7-063 v sy = 5 v v cm = v sy / 2 a v = 1 f r e q u e n c y ( h z ) 0943 figure 59. voltage noise density
ADA4528-1 rev. 0 | page 17 of 20 printed circuit board layout the ADA4528-1 is a high precision device with ultralow offset voltage and noise. therefore, care must be taken in the design of the printed circuit board (pcb) layout to achieve optimum performance of the ADA4528-1 at board level. to avoid leakage currents, keep the surface of the board clean and free of moisture. coating the board surface creates a barrier to moisture accumulation and reduces parasitic resistance on the board. properly bypassing the power supplies and keeping the supply traces short minimizes power supply disturbances caused by output current variation. connect bypass capacitors as close as possible to the device supply pins. stray capacitances are a concern at the outputs and the inputs of the amplifier. it is recommended that signal traces be kept at a distance of at least 5 mm from supply lines to minimize coupling. a potential source of offset error is the seebeck voltage on the circuit board. the seebeck voltage occurs at the junction of two dissimilar metals and is a function of the temperature of the junction. the most common metallic junctions on a circuit board are solder-to-board trace and solder-to-component lead. figure 60 shows a cross section of a surface-mount component soldered to a pcb. a variation in temperature across the board (where t a1 t a2 ) causes a mismatch in the seebeck voltages at the solder joints, thereby resulting in thermal voltage errors that degrade the per- formance of the ultralow offset voltage of the ADA4528-1. solder + + + + component lead copper trace v sc1 ts1 t a1 surface-mount component pc board t a2 v sc2 v ts2 if t a1 t a2 , then v ts1 + v sc1 v ts2 + v sc2 09437-154 v figure 60. mismatch in seebeck voltages causes seebeck voltage error to minimize these thermocouple effects, orient resistors so that heat sources warm both ends equally. where possible, the input signal paths should contain matching numbers and types of com- ponents to match the number and type of thermocouple junctions. for example, dummy components, such as zero value resistors, can be used to match the thermoelectric error source (real resistors in the opposite input path). place matching components in close proximity and orient them in the same manner to ensure equal seebeck voltages, thus cancelling thermal errors. additionally, use leads that are of equal length to keep thermal conduction in equilibrium. keep heat sources on the pcb as far away from amplifier input circuitry as is practical. it is highly recommended to use a ground plane. a ground plane helps distribute heat throughout the board, maintains a constant temperature across the board, and reduces emi noise pick up.
ADA4528-1 rev. 0 | page 18 of 20 compliant to jedec standards mo-187-aa 6 0 0.80 0.55 0.40 outline dimensions 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 5.15 4.90 4.65 3.20 3.00 2.80 pin 1 identifier 0.95 0.85 0.75 15 max 0.15 0.05 10-07-2009-b figure 61. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters ordering guide model 1 temperature range package description package option branding ADA4528-1armz ?40c to +125c 8-lead mini small outline package [msop] rm-8 a2r ADA4528-1armz-r7 ?40c to +125c 8-lead mini small outline package [msop] rm-8 a2r ADA4528-1armz-rl ?40c to +125c 8-lead mini small outline package [msop] rm-8 a2r 1 z = rohs compliant part.
ADA4528-1 rev. 0 | page 19 of 20 notes
ADA4528-1 rev. 0 | page 20 of 20 notes ?2011 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d09437-0-1/11(0)

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